Micron Know-how has introduced the provision of DDR5 reminiscence for the info middle that’s validated for the brand new AMD EPYC 9004 Sequence processors. As trendy servers pack extra processing cores into CPUs, the reminiscence bandwidth per CPU core has been lowering. Micron DDR5 alleviates this bottleneck by offering larger bandwidth in comparison with earlier generations, enabling elevated reliability and scaling. The mix of 4th Gen AMD EPYC processors and Micron DDR5 delivers as much as two instances reminiscence bandwidth on the STREAM benchmark and as much as two instances efficiency enchancment on choose HPC workloads comparable to computational fluid dynamics (OpenFOAM), Climate Analysis and Forecasting (WRF) modeling and CP2K moleculardynamics.
“Micron continues to steer the business transition to DDR5,” stated Raj Hazra, senior vp and basic supervisor of Micron’s Compute and Networking Enterprise Unit. “Extracting insights from large volumes of information requires more and more memory-bound algorithms that want considerably higher reminiscence efficiency with improved reliability. DDR5 gives the subsequent important development in system reminiscence capabilities required to allow these algorithms, thereby persevering with to advance the worth of subsequent technology information middle infrastructure.”
“4th Gen AMD EPYC processors proceed to boost the bar for workload efficiency within the trendy information middle whereas concurrently delivering distinctive vitality effectivity. 4th Gen AMD EPYC processors will remodel our clients’ information middle operations by accelerating time to worth, driving decrease complete price of possession, and serving to enterprises to handle their sustainability targets,” stated Ram Peddibhotla, company vp, EPYC product administration, AMD.
Micron in contrast the efficiency of the STREAM benchmark on a single 4th Gen AMD EPYC processor system populated with Micron DDR5 at 4800 MT/s to a 3rd Gen AMD EPYC processor system and Micron DDR4 at 3200 MT/s. With the 4th Gen AMD EPYC processor system, Micron achieved a peak reminiscence bandwidth of 378 GB/s per socket in comparison with 189 GB/s with 3rd Gen AMD EPYC processor system. This resulted in a two instances enhance in system reminiscence bandwidth
In partnership with AMD, Micron evaluated three HPC workloads (OpenFOAM, WRF and CP2K) on 3rd Gen AMD EPYC processors with Micron DDR4 and 4th Gen AMD EPYC processors with Micron DDR5. The 4th Gen AMD EPYC processor platform with Micron DDR5 improved the efficiency of OpenFOAM by 2.4 instances, WRF by 2.1 instances and CP2K by 2.03 instances.
“The continued development of modeling & simulation, and machine studying workloads in HPC and AI signifies that our clients are demanding reminiscence options that maximize efficient bandwidth. Our collaboration with Micron all through the event and validation section, with these performance-intensive workloads in thoughts, permits us to ship next-generation platforms with a brand new period in reminiscence efficiency accelerated by DDR5,” stated Scott Tease, vp of HPC & AI, Lenovo Infrastructure Options Group.
Micron has performed a pivotal position in JEDEC’s creation of DDR5 reminiscence specs and was one of many first to pattern DDR5 to clients. Micron’s Know-how Enablement Program (TEP), the primary of its sort within the business, gave system designers early entry to key inner sources to help their DDR5 validation and qualification processes. Micron is dedicated to partnering throughout the ecosystem and can proceed to spend money on our management know-how and product roadmaps.
